This paper proposes a novel and fully optimized Ultra-wideband rf receiver front end in UMC 180nm 1P6M CMOS process. The heterodyne architecture used in this work does not use the on-chip image reject mixer. The proposed receiver consists of cascode inductively degenerated common source differential low noise amplifier and folded Gilbert down-conversion mixer. The differential low noise amplifier eliminates the use of active balun and improves the noise performance, while folded architecture reduces the power dissipation of the receiver. The post layout simulated result shows the receiver has voltage gain of 15.2 - 19.8dB, noise figure of 4.8 - 8.9dB, third order input intercept point (IIP3) of -6.3 to -2.9dBm and consumes 31.5mW from a 1.8V supply. The receiver has good reverse isolation of S12 of -42 to -59dB due to cascode configuration and it occupies an area of 2.55mm2.
Key words: CMOS, UWB, Noise Figure, IIP3, receiver front end
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