Quantum-dot Cellular Automata (QCA) is an innovative technology in the nano-scale for changing the CMOS revolution with an alternative one. It provides some benefits in reversible logic like competitive power consumption and feature size. Therefore, much attention paid to produce different reversible circuits using that technique. This paper presents a superior model for reversible Feynman gate based odd parity generator and checker. The proposed model can be utilized for loss bit detection /checking in telecommunication systems. The proposed parity generator, parity checker and Nano communication circuit have complexity reduction by 25%, 37% and 24% respectively in terms of requiring cells. The circuit verification is done using the QCADesigner tool.
Key words: QCA, Reversible gate, parity generator, parity checker.
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